Electronics & Communication Engineering - Basic Electronics

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7.

When the output of a tri-state shift register is disabled, the output level is placed in a:                        
A. float state B. LOW state
C. high impedance state D. float state and a high impedance state



8.

A comparison between ring and johnson counters indicates that:                        
A. a ring counter has fewer flip-flops but requires more decoding circuitry B. a ring counter has an inverted feedback path
C. a johnson counter has more flip-flops but less decoding circuitry D. a johnson counter has an inverted feedback path



9.

A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?                        
A. shift register sequencer B. clock
C. johnson D. binary




10.

What is meant by parallel-loading the register?                        
A. Shifting the data in all flip-flops simultaneously B. Loading data in two of the flip-flops
C. Loading data in all four flip-flops at the same time D. Momentarily disabling the synchronous SET and RESET inputs



11.

What is a shift register that will accept a parallel input and can shift data left or right called?                        
A. tri-state B. end around
C. bidirectional universal D. conversion



12.

What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs?                        
A. The output word decreases by 1 B. The output word decreases by 2
C. The output word increases by 1 D. The output word increases by 2



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