Electronics & Communication Engineering - Pulse And Digital Circutes

You Are Here :: Home > Electronics & Communication Engineering > Pulse And Digital Circutes - General Questions

 
25.

The interval of time of transmission of a signal in a sampling gate is selected by means of                        


A. time delay B. off time of gate
C. gating signal D. source signal




26.

The following all are disadvantages of unidirectional gate, except                        


A. interaction between the signal source and control voltage source B. limited used of gate
C. slow rise of the control voltage D. little time delay though the gate




27.

Which of the following logic gives the complementary outputs?                        


A. DTL B. RTL
C. TTL D. ECL




28.

The voltage at the input of a gate which causes a change in the state of the ouput from one logic level totheotheris                        


A. cut-in voltage B. cut-off voltage
C. threshold voltage D. peak voltage




29.

The high state fan out of a gate is defined at when the                        


A. input is at logic ‘0’ B. input is at logic ‘1’
C. output is at logic ‘1’ D. output is at logic ‘0’




30.

When a square wave is given as input to a low pass RC circuit a reasonable reproduction of input is obtained if the rise time tr is ___________ compared with pulse width                        


A. Equal B. Smaller
C. Not equal D. Larger




« prev

1

2

3

4

5

6

7

8

9

next »

 
 



© 2013 freshersindia.in ® | Copyrights | Terms & Conditions
   Designed by Freshers India
Catch Us on